1. Field of the Invention
The present invention relates to a liquid crystal display, and more particularly to a liquid crystal display device and a fabricating method thereof that are adaptive for improving picture quality.
2. Description of the Related Art
Generally, a liquid crystal display (LCD) controls light transmittance using an electric field to display a picture. To this end, the LCD includes a liquid crystal panel having liquid crystal cells arranged in a matrix type, and a driving circuit for driving the liquid crystal panel. The liquid crystal panel is provided with pixel electrodes for applying an electric field to each liquid crystal cell, and a common electrode. Typically, the pixel electrode is provided on a lower substrate for each liquid crystal cell, whereas the common electrode is integrally formed on the entire surface of an upper substrate. Each of the pixel electrodes is connected to a thin film transistor (TFT) used as a switching device. The pixel electrode drives the liquid crystal cell, along with the common electrode, in accordance with a data signal applied via the TFT.
Referring to FIG. 1 and FIG. 2, a lower substrate 1 of a LCD includes a TFT T arranged at an intersection between a data line 4 and a gate line 2, a pixel electrode 22 connected to a drain electrode 10 of the TFT, and a storage capacitor S positioned at an overlapping portion between the pixel electrode 22 and the pre-stage gate line 2.
The TFT T includes a gate electrode 6 connected to the gate line 2, a source electrode 8 connected to the data line 4, and a drain electrode 10 connected, via a drain contact hole 20, to the pixel electrode 22. Further, the TFT T includes semiconductor layers 14 and 16 for defining a channel between the source electrode 8 and the drain electrode 10 by a gate voltage applied to the gate electrode 6. Such a TFT T responds to a gate signal from the gate line 2 to selectively apply a data signal from the data line 4 to the pixel electrode 22.
The pixel electrode 22 is positioned at a cell area divided by the data line 4 and the gate line 2 and is made from a transparent conductive material having a high light transmittance. The pixel electrode 22 generates a potential difference from a common transparent electrode (not shown) provided at an upper substrate (not shown) by a data signal applied via the drain contact hole 20. By this potential difference, a liquid crystal positioned between the lower substrate 1 and the upper substrate (not shown) is rotated due to its dielectric anisotropy. Thus, the liquid crystal allows a light applied, via the pixel electrode 22, from a light source to be transmitted into the upper substrate.
The storage capacitor S charges a voltage in an application period of a gate high voltage to the pre-stage gate line 2 while discharging the charged voltage in an application period of a data signal to the pixel electrode, to thereby prevent a voltage variation in the pixel electrode 22. The storage capacitor S consists of a gate line 2, and a storage electrode 24 overlapping with the gate line 2 and having a gate insulating film 12 disposed therebetween and being electrically connected, via a storage contact hole 26 defined at a protective film 18, to the pixel electrode 22.
A method of fabricating the lower substrate 1 of the liquid crystal display having the above-mentioned configuration will now be described.
First, a gate metal layer is deposited onto the lower substrate 1 and then patterned to form the gate line 2 and the gate electrode 6 as shown in FIG. 3A. An insulating material is entirely deposited onto the lower substrate 1 in such a manner to cover the gate line 2 and the gate electrode 6, thereby forming the gate insulating film 12 as shown in FIG. 3B. First and second semiconductor layers are sequentially deposited onto the gate insulating film 12 and then patterned to form an active layer 14 and an ohmic contact layer 16.
Subsequently, a data metal layer is deposited onto the gate insulating film 12 and then patterned to form the storage electrode 24, the source electrode 8 and the drain electrode 10 as shown in FIG. 3C. Thereafter, the ohmic contact layer 16 is etched to expose the active layer 14 in order to define a desired size of channel. A portion of the active layer 14 corresponding to the gate electrode 6 between the source electrode 8 and the drain electrode 10 defines a channel.
Then, a protective film 18 is formed on the gate insulating film 12 and then patterned to form the drain contact hole 20 and the storage contact hole 26 in such a manner to expose the drain electrode 10 and the storage electrode 24 as shown in FIG. 3D.
Subsequently, a transparent conductive material is deposited onto the protective layer 18 and then patterned to form the pixel electrode 22, electrically contacting the drain electrode 10 and the storage electrode 24 as shown in FIG. 3E.
In such a conventional LCD, when a gate signal applied to the gate electrode 6 is turned off and thus fallen, a feed-through voltage 8Vp corresponding to the difference between the data voltage applied to each of the data line (based on a voltage of the common electrode) and the liquid crystal cell voltage charged in the liquid crystal cell is created as indicated in the following equation:ΔVp={(Cgd/C1c+Cs+Cgd)}(Vgh−Vgl)  (1)wherein ΔVp represents the feed-through voltage; Cgd the parasitic capacitor of the gate/drain electrode; Cst the storage capacitor; Vgh the gate high voltage; and Vgl the gate low voltage.
This feed-through voltage ΔVp is created by a parasitic capacitor existing between the gate terminal of the TFT and the liquid crystal cell Clc as can be seen from the above equation (1), and which periodically changes the amount of transmitted light of the liquid crystal cell Clc. As a result, a flicker and a residual image emerges at the picture displayed on the LCD.
In order to sufficiently restrain such a feed-through voltage ΔVp, it is necessary to enlarge the capacitance of the storage capacitor Cst, but the above-mentioned LCD structure has a limit in enlarging the capacitance of the storage capacitor Cst.